This course presents recent commercial and research developments in microprocessors. The course begins with an in-depth microarchitectural-level review of basic out-of-order superscalar processor datapath. The course next discusses extensions and variations of the basic superscalar design to address not only performance but also increasingly important issues of power and reliability. Both hardware and software techniques for improving the efficiency of microprocessing will be discussed. Furthermore, the course goes beyond current commercial state-of-the-art to discuss emerging ideas that are likely to impact microprocessor developments in the next 10 years. 3 hrs. lec. Prerequisite: 18-741 (previously 18-547).